From: Main memory controller with multiple media technologies for big data workloads
Memory Structure | Memtier/NV-S-D | commDRAM | DRAM | eDRAM | MRAM |
---|---|---|---|---|---|
L2 (LLC) cache | L2 Miss latency | 85 | 68 | 63 | 63 |
Sector cache | HMC Hit-Ratio | 40.74 | 41.24 | 41.01 | 40.98 |
HMC MPKI | 3.39 | 3.40 | 3.45 | 3.40 | |
HMC Miss latency | 108 | 80 | 71 | 71 | |
(x)RAM Cache | TAG Hit-Ratio (%) | 82.77 | 82.90 | 83.27 | 82.91 |
(x)RAM latency | 81 | 53 | 45 | 46 | |
NVRAM DIMM | Read/Write (%) | 49.63/50.37 | 49.55/50.45 | 49.64/50.36 | 49.61/50.39 |
NVRAM Latency | 258 | 252 | 255 | 255 |