Table 6 Redis benchmark statistics for each technology
From: Main memory controller with multiple media technologies for big data workloads
Memory structure | REDIS/NV-S-D | commDRAM | DRAM | eDRAM | MRAM |
|---|---|---|---|---|---|
L2 (LLC) cache | L2 Miss latency | 51 | 45 | 43 | 43 |
Sector cache | HMC Hit-Ratio | 75.93 | 75.52 | 75.32 | 75.41 |
HMC MPKI | 1.81 | 1.83 | 1.85 | 1.84 | |
HMC Miss Latency | 101 | 76 | 67 | 67 | |
(x)RAM cache | TAG Hit-Ratio (%) | 94.87 | 94.99 | 95.00 | 95.02 |
(x)RAM Latency | 70 | 49 | 41 | 42 | |
NVRAM DIMM | Read / Write (%) | 49.82/50.18 | 49.85/50.15 | 49.84/50.16 | 49.83/50.17 |
NVRAM Latency | 256 | 242 | 242 | 242 |