Table 2 gem5 system configuration parameters for a 22 nm technology node
From: Main memory controller with multiple media technologies for big data workloads
Component | Parameter | Value |
|---|---|---|
CPU | Type | TimingSimpleCPU |
Frequency | 2.0 GHz | |
L1 Data cache | Size, block size, associativity | 32 KB, 64 B, 8-way |
Tag/Data latency | 3/3 cycles | |
L1 Inst. cache | Size, block size, associativity | 32 KB, 64 B, 8-way |
Tag/Data latency | 3/3 cycles | |
L2 Cache | Size, block size, associativity | 2 MB, 64 B, 16-way |
Tag/Data latency | 11/11 cycles | |
Write policy | Write-back | |
HMC Sector cache | Size, block size, associativity | 8 MB, 256 B, 16-way |
Tag/Data latency | 17/17 cycles | |
Write policy | Write-back | |
x-RAM cache | Memory channels | 2 |
Total space storage | 64MB |